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2c accurate, 12-bit digital temperature sensor preliminary technical data adt7408 rev. prc information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2005 analog devices, inc. all rights reserved. features 12-bit temperature-to-digital converter 2 o c accuracy typ operation from ?20c to +125c operation from 3 v to 3.6 v average supply current (500 a max) selectable 0, 1.5 o c, 3 o c, 6 o c hysteresis smbus- /i2c- compatible interface dual purpose event pin: comparator or interrupt 8-pin lfcsp 3mm x 3mm (jedec mo-229 veed-4) package complies with jedec standard jc-42.4 memory module thermal sensor component specification applications memory module temperature monitoring isolated sensors environmental control systems computer thermal monitoring thermal protection industrial process control power-system monitors hand held applications functional block diagram adt7408 capability register configuration register alarm temp upper boundary trip register alarm temp lower boundary trip register critical temp register temperature register manufacturer?s id register factory reserved register address pointer register 12/10 bit event# v ss 5 6 1 2 3 4 8 7 adt7408 capability register configuration register alarm temp upper boundary trip register alarm temp lower boundary trip register critical temp register temperature register manufacturer?s id register factory reserved register address pointer register 12/10 bit event# v ss 5 6 1 2 3 4 8 7 figure 1. general description the adt7408 is the first digital temperature sensor that complies with jedec standard jc-42.4 for mobile platform memory module. the adt7408 contains a band gap temperature sensor and 12-bit adc to monitor and digitize the temperature to a resolution of 0.0625c. there is an open-drain event# output that is active when the monitoring temperature exceeds a critical programmable limit or the temperature falls above or below an alarm window. this pin can operate in either comparator or interrupt mode. there are three slave-device address pins that allows up to eight adt7408s to be used in a system that monitors temperature of various components and subsystems. the adt7408 is specified for operation at supply voltages from 3.0 v to 3.6 v. operating at 3.3 v, the average supply current is less than typically 240a. the adt7408 offers a shutdown mode that powers down the device and gives a shutdown current of typically 3 a. the adt7408 is rated for operation over the C20c to +125c temperature range. the adt7408 is available in lead-free 8-lead lfcsp 3mm x 3mm (jedec mo- 229 veed-4) package.
adt7408 preliminary technical data rev. prc | page 2 of 22 specifications all specifications t a = ?20c to +125c, v dd = 3.0 v to 3.6 v, unless otherwise noted. table 1. parameter symbol min typ ma unit test conditions/comments temperature sesor ad adc local sensor accuracy c grade 1.0 2.0 c 75c
preliminary technical data adt7408 rev. prc | page 3 of 22 timing characteristics guaranteed by design and characterization, not production tested. the sda & scl timing is measured with the input filters turne d on so as to meet the fast-mode i 2 c specification. switching off the input filters improves the transfer rate but has a negative affect on the emc behavior of the part. t a = ?20c to +125c, v dd = 3.0 v to 3.6 v, unless otherwise noted . table 2. parameter symbol mi tp ma units comments scl cloc freuency f scl 10 100 bus free time between a stop p and start s condition t buf 4.7
adt7408 preliminary technical data rev. prc | page 4 of 22 absolute maximum ratings table 3. parameter rating v dd to v ss 0.3 v to +7 v sda input voltage to v ss 0.3 v to v dd + 0.3 v sda output voltage to v ss 0.3 v to v dd + 0.3 v scl input voltage to v ss 0.3 v to v dd + 0.3 v event output voltage to v ss 0.3 v to v dd + 0.3 v operating temperature range 55c to +150c storage temperature range 65c to +160c maimum unction temperature, t ma 150c power dissipation 1 p ma = t ma ? t a 2 /
preliminary technical data adt7408 rev. prc | page 5 of 22 pin configurations and function descriptions table 4. pin function descriptions pin o. mnemonic description 1 a0 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 2 a1 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 3 a2 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 4 v ss egative supply, round. 5 sda smbus/i 2 c serial data input/output. serial data to be loaded into the parts registers and read from these registers is provided on this pin. open-drain configuration - needs a pullup resistor. 6 scl serial cloc input. this is the cloc inp ut for the serial port. the serial cloc is used to cloc in and cloc out data to and from any register of the adt7408. open-drai n configuration - needs a pullup resistor. 7 event active low. open drain event output pin. dri ven low on comparator level, or alert interrupt 8 v dd positive supply, power. the supply should be decoupled to ground. figure 3. lfcsp-8 bottom view pin configurations - 1 2 8 3 4 7 6 5 bottom view ot to scale adt7408 lfcsp-8 mo-229 veed-2
adt7408 preliminary technical data rev. prc | page 6 of 22 theory of operation circuit information the adt7408 is a 12-bit digital temperature sensor. its output is two?s complement that the 12 th bit is the sign bit. an on- board sensor generates a voltage precisely proportional to absolute temperature, which is compared to an internal voltage reference and is input to a precision digital modulator. overall accuracy for the adt7408 is 2c from 75c to 95c, 3c from 40c to +125c, and 4c from -20c to +125c with excellent transducer linearity. the serial interface is smbus- /i 2 c- compatible and the open-drain output of the adt7408 is capable of sinking 6 ma. the on-board temperature sensor has excellent accuracy and linearity over the entire rated temperature range without needing correction or calibration by the user. the sensor output is digitized by a first-order - modulator, also known as the charge balance type analog-to-digital converter. this type of converter utilizes time-domain over- sampling and a high accuracy comparator to deliver 12 bits of effective accuracy in an extremely compact circuit. converter details the - modulator consists of an input sampler, a summing network, an integrator, a comparator, and a 1-bit dac. this architecture creates a negative feedback loop that minimizes the integrator output by changing the duty cycle of the comparator output in response to input voltage changes. the comparator samples the output of the integrator at a much higher rate than the input sampling frequency, called oversampling. oversampling spreads the quantization noise over a much wider band than that of the input signal, improving overall noise performance and increasing accuracy. figure 4. first-order -? t si tiadsipti t i d a t t t si tadt - adttadt d t - adt i t s t adt t t att att tti ttt
preliminary technical data adt7408 rev. prc | page 7 of 22 temperature data format the 16-bit value used in the three temperature trip point registers and temperature register is in two?s complement format. the temperature register has a 12-bit resolution with 256 o c range with one lsb = 0.0625 o c (256 o c/2 12 ). the temperature data in the three temperature trip point registers (alarm upper, alarm lower and critical), is a 10-bit format with 256 o c range with one lsb = 0.25 o c. d12 in all these registers represent the sign bit such that 0 = positive and 1 = negative. in two?s complement format, the data bits are inverted and add 1 if the sign bit is negative. for example if the following values are read in the temperature register: 1. a t 1 value of 0x019c is 0000 0001 1001 1100 in binary, thus t 1 = + 0x19c * 0.0625 = +25.75 o c 2. a t 2 value of 0x07c0 is 0000 0111 1100 0000 in binary, thus t 2 = 0x7c0 * 0.0625 = +124 o c 3. a t 3 value of 0x1e74 is 0001 1110 0111 0100 in binary. since the sign bit is negative, the data becomes 0001 1000 1100, thus t 3 = - 0x18c * 0.0625 = -24.75 o c if the following value is read from the critical temperature register 1. a value of 0x07c0 is 0000 0111 1100 0000 in binary, thus the critical temperature = + 0x1f0 * 0.25 = +124 o c the temperature calculations above are cumbersome, the more convenient temperature conversion formula can be found in equations (1) to (4) later. although one lsb of the adc corresponds to 0.0625c. the adc can theoretically measure a temperature range of 255c (?128c to +127c ), but the adt7408 is guaranteed to measure a low value temperature limit of ?55c to a high value temperature limit of +125c. reading back the temperature from the temperature value register requires a two byte re ad unless only a 1c (8-bits) resolution is required, then a one byte read is required. designers used to using a 9-bit temperature data format can still use the adt7408 by ignoring the last three lsbs of the 12- bit temperature value. these three lsbs are bit d4 to bit d6 in table 5. table 5. 12-bit temperature data format temperature digital output binary d11 to d0 digital output e ?55c 1100 1001 0000 c90 ?50c 1100 1110 0000 ce0 ?25c 1110 0110 1111 e6f ?0.0625c 1111 1111 1111 fff 0c 0000 0000 0000 000 +0.0625c 0000 0000 0001 0001 +10c 0000 1010 0000 00a0 +25c 0001 1001 0000 0190 +50c 0011 0010 0000 0320 +75c 0100 1011 0000 04b0 +100c 0110 0100 0000 0640 +125c 0111 1101 0000 07d0 temperature conversion formulas 12-bit temperature data format positive temperature = adc coded/16 1 egative temperature = adc coded ? 4096/16 2 for adc code, bit d12 sign bit is removed from the adc code. 10-bit temperature data format positive temperature = adc coded/4 3 egative temperature = adc coded 1024/4 4 for adc code, bit d12 sign bit is removed from the adc code
adt7408 preliminary technical data rev. prc | page 8 of 22 description the thermal sensor continuously monitors the temperature and updates the temperature data ten times per second. temperature data is latched internally by the device and may be read by software from the bus host at any time. smbus/i2c slave address selection pins allow up to 8 such devices to co-exist on the same bus. this means that up to 8 memory modules can be supported given each module has one such slave device address slot. after initial power-on, the configuration registers are set to the default values. software can write to the configuration register to set bits as per the bit-definitions in the following section. adt7408 registers the adt7408 contains sixteen accessible registers shown in table 6. the address pointer register is the only register that is 8 bits while the rest are 16 bits wide. on power-up, the address pointer register is loaded with 0x00 and points to the capability register. table 6. adt7408 registers pointer address ame power-on default read/write ot applicable address pointer 000 write 000 capability register 0001d read 001 configuration register 00000 read/write 002 alarm temp upper boundary trip register 00000 read/write 003 alarm temp lower boundary trip register 00000 read/write 004 critical temp trip register 00000 read/write 005 temperature register undefined read 006 manufacturers id register 011d4 read 007 device id/revision register 00800 read 008-00f vendor-defined registers 00000 reserved address pointer register (write only) tis bit write only register selets wi of te 6bit registers is aessed in subseuent read/write operations. address spae between and f are reserved for fatory usage or test registers. table 7. address pointer register bits d7 d6 d5 d4 d3 d2 d1 d0 content 0 0 0 0 register select register select register select register select table 8. address pointer selected registers d2 d1 d0 register selected 0 0 0 capability register 0 0 1 configuration register 0 1 0 alarm temp upper boundary trip register 0 1 1 alarm temp lower boundary trip register 1 0 0 critical temp trip register 1 0 1 temperature register 1 1 0 manufacturer id 1 1 1 device id/revision
preliminary technical data adt7408 rev. prc | page 9 of 22 capability register (read only) tis 6bit read only register indiates te apabilities of te termal sensor. table 9. capability register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 content rfu rfu rfu rfu rfu rfu rfu rfu rfu rfu rfu tres1 tres0 wider range igher precision as alarm critical trips rfu=reserved for future use table 10. capability mode description bits description d0 basic capability 1 as alarm critical trips capability reuired d1 accuracy 0 default, accuracy +/-2 o c over the active and +/-3 o c monitor ranges d2 wider range 0 values lower than 0 o c will be clamped and represented as binary value 0 1 can read temperature below 0 o c and set sign bit accordingly default d4d3 temperature resolution 00 0.5 o c lsb 01 0.25 o c lsb 10 0.125 o c lsb 11 0.0625 o c lsb default d15d5 0 reserved for future use. must be ero configuration register (read/write) tis 6bit read/write register stores various onfiguration modes for te at and are sown in tables and . table 11. configuration register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 content rfu rfu rfu rfu rfu ysteresis shut- down mode critical loc bit alarm loc bit clear event event output status event output control critical event only event polarity event mode table 12. configuration mode description bits description d0 event mode 0 comparator output mode default 1 interrupt mode when either of the loc bits is set, this bit cannot be altered until unloced. d1 event polarity 0 active low default 1 active igh when either of the loc bits is set, this bit cannot be altered until unloced. d2 critical event only
adt7408 preliminary technical data rev. prc | page 10 of 22 0 ? event output on alarm or critical temp event (default) 1 ? event only if temperature is above th e value in the critical temp register when either of the lock bits is set, this bit cannot be altered until unlocked. d3 event output control 0 ? event output disabled (default) 1 ? event output enabled when either of the lock bits is set, this bit cannot be altered until unlocked. d4 event status (read only) 0 ? event output condition is not being asserted by this device 1 ? event output pin is being asserted by this devi ce due to alarm window or critical trip condition the actual event causing the event can be dete rmined from the read temperature regist er. interrupt events can be cleared by writing to ?clear event? bit. writin g to this bit will have no effect. d5 clear event (write only) 0 ? no effect 1 ? clears active event in interrupt mode. wr iting to this register has no effect in comparator mode. when read, this bit will always return zero ?0?. once the dut temperature is greater th an the critical temperature, event cannot be cleared. d6 alarm window lock bit 0 ? alarm trips are not locked and can be altered (default) 1 ? alarm trip register settings cannot be altered this bit is initially cleared. wh en set this bit will return a 1, and remain locked until cleared by intern al power on reset. t hese bits can be written with a single write and do not require double writes. d7 critical trip lock bit 0 ? critical trip is not locked and can be altered (default) 1 ? critical trip register settings cannot be altered this bit is initially cleared. wh en set this bit will return a 1, and remain locked until cleared by intern al power on reset. t hese bits can be written with a single write and do not require double writes. d8 shutdown mode 0 ? enabled ts (default) 1 ? shutdown ts when shutdown, the thermal sensing device and a/d converter are disabled to save power, no events will be generated. when either of the lock bits is set, this bit cannot be se t until unlocked. however it can be cleared at any time. d10:9 hysteresis enable 00 ? disable hysteresis 01 ? enable hysteresis at 1.5 o c 10 ? enable hysteresis at 3 o c 11 ? enable hysteresis at 6 o c when enabled, hysteresis is applied to te mperature movement around trigger points. for example, consider the behavior of the ?above alarm window? bit (bit 14 of the temperatur e register) when the hysteresis is set to 3 o c. as the temperature rises, but 14 will be set to 1 (temperature is above the alarm window) when the temperature register contains a value that is greater than th e value in the alarm temperature upper boundary register. if the temperature decreases, bit 14 will remain set until the measured temperature is less than or equal to the value in the alarm temperatur e upper boundary register minus 3 o c. see figure x for more detail. similarly, the ?below alarm window? bit (bit 13 of the temperature register) will be se t to 0 (temperature is equal to or above the alarm window lower boundary trip temperature) when the value in the temperature register is equal to or greater than the value in the alarm temperature lower bo undary register. as the temperature decreases, bit 13 will be set to 1 when the value in the temperature register is equal to or less than the value in the alarm temperature lower boundary register minus 3 o c. note that hysteresis is al so applied to event# pin fu nctionality. when either of the lock bi ts is set, these bits cannot be alt ered.
preliminary technical data adt7408 rev. prc | page 11 of 22 figure 5. ysteresis
adt7408 preliminary technical data rev. prc | page 12 of 22 temperature trip point registers there are three temperature trip point registers, they are the alarm temperature upper boundary register, the alarm temperature lower boundary register, and the critical temperature register alarm temperature upper boundary register (read/write) the value is the upper threshold temperature value for alarm mode. the data format is two?s complement with one lsb = 0.25 o c. rfu (reserved for future use) bits are not supported and will always report zero. interrupts will respond to the presently programm ed boundary values. if boundary values are being altered in-system, it is advised to turn off interrupts until a known state can b e obtained to avoid superfluous interrupt activity. the format of this register in shown in table 13. table 13 alarm temperature upper boundary register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign msb lsb content 0 0 0 alarm window upper boundary temperature rfu rfu alarm temperature lower boundary register read/write the value is the lower threshold temperature value for alarm mode. the data format is twos complement with one lsb = 0.25 o c. rfu bits are not supported and will always report ero. interrupts will respond to the presently programmed boundary values. if bou ndary values are being altered in-system, it is advised to turn off interrupts until a nown state can be obtained to avoid superfluo us interrupt activity. the format of this register in shown in table 14. table 14 alarm temperature lower boundary register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign msb lsb content 0 0 0 alarm window upper boundary temperature rfu rfu critical temperature register read/write the value is the critical temperature. the data format is twos complement with one lsb = 0.25 o c. rfu bits are not supported and will always report ero. the format of this register in shown in table 15. table 15 critical temperature register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign msb lsb content 0 0 0 critical temperature trip point rfu rfu temperature value register read only this 16-bit read only register stores the trip status and the temperature measured by the internal temperature sensor as shown in table 16. the temperature is stored in 13-bit twos complement format with the msb being the temperature sign bit and the 12 lsbs rep resent temperature. one lsb = 0.0625 o c. the most significant bit will have a resolution of 128 o c. when reading from this register the eight msbs bit d15 to bit d8 are read first and then the eight lsbs bit d7 to bit d0 ar e read. the trip status bits represent the internal temperature trip detection, and are not affected by the status of the event or conf iguration bits e.g. event output control, clear event. if neither above or below are set i.e. both are 0 then the current temperature is ea ctly within the alarm window boundaries as defined in the configuration register. the format and descriptions are shown in tables 16 and 17 respectively.
preliminary technical data adt7408 rev. prc | page 13 of 22 table 16 temperature register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign msb lsb contents above critical trip above alarm window below alarm window temperature table 17. temperature register trip status description bit definition d13 below alarm window 0 temp is eual to or above the al arm window lower boundary temperature 1 temp is below the alarm window lower boundary temperature d14 above alarm window 0 temp is eual to or below the al arm window upper boundary temperature 1 temp is above the alarm wind ow upper boundary temperature d15 above critical trip 0 temp is below the critical temperature setting 1 temp is eual to or above the critical temperature setting anufaturer register (read only) tis manufaturer mates tat assigned to a vendor witin t e pc s. tis register may be used to identify te manufatur er of te devie in order to perform manufaturer speifi operations. anufaturer s an be found at www.pisig.om . te format of tis register in sown in table . table 17. manufacturer id register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 content 0 0 0 1 0 0 0 1 1 1 0 1 0 1 0 0 device id and revision register read only this device id and device revision are assigned by the manufacturer of the device. the device revision will start at 0 and be incremented by one whenever an update to the device is issued by the manufacturer of the device. the format of this register in shown in table 19. table 18. device id and device revision register bits d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 content 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
adt7408 preliminary technical data rev. prc | page 14 of 22 event pin functionality figure 6 shows the 3 differently-defined outputs of event correspondent to the temperature change. event can be programmed to be one of the three output modes in the configuration register. if in interrupt mode and the temperature reaches the critical temperature, the device switches to the comparator mode automatically and asserts the event output. when the temperature drops below the critical temperature, the part switches bac to either interrupt, or comparator mode, as programmed in the configuration register. ote that figure 6 is drawn with no hysteresis, but the values programmed into register 001 bits 109 affect the operation of the event trigger points. see figure 5 and table 12 for the eplanation of hysteresis functionality. event thresholds all event thresholds use hysteresis as programmed in register 001 bits 109 to set when they de-assert. alarm window trip the device provides a comparison window with an upper temperature trip point in the alarm upper boundary register, and a lower trip point in the alarm lower boundary register. when enabled, the event output will be triggered whenever entering, or eiting crossing above or below the alarm window. critical trip the device can be programmed in such a way that the event output is only triggered when the temperature eceeds critical trip point. the critical temperature setting is programmed in critical temperature register. when the temperature sensor reaches the critical temperature value in this register, the device is automatically placed in comparator mode meaning that the critical event output cannot be cleared through software setting the clear event bit. interrupt mode after an event occurs, software may write a one 1 to the clear event bit in the configuration register to de-assert the event interrupt output, until the net trigger condition occurs. comparator mode reads/writes on the device registers will not affect the event output in comparator mode. the event signal will remain asserted until the temperature drops outside the range, or the range is re-programmed such that the current temperature is outside the range. ote event cannot be cleared once the dut temperature is greater than the critical temperature. figure 6. temperature, trip, and events
preliminary technical data adt7408 rev. prc | page 15 of 22 adt7408 serial interface control of the adt7408 is carried out via the smbus-/i 2 c- compatible serial interface. the adt7408 is connected to this bus as a slave and is under the control of a master device. figure shows a typical smbus-/i2c- interface connection. figure 7. typical smbus/i 2 c interface connection serial bus address ie all sbus/ c ompatible devies, te at as a bit serial address. te four sbs of tis address for te at are set to . te tree sbs are set by pin , pin , and pin (a, a and a). tese pins an be onfigured eiter low or ig permanently or dynamially to give eigt different address options. table sows te different bus address options available. reommended pullup resistor value on te sa and sc lines is . . table 20. smbus/i 2 c bus address options biar a6 a5 a4 a3 a2 a1 a0 e 0011 0 0 0 0011 0 0 1 0011 0 1 0 0011 0 1 1 0011 1 0 0 0011 1 0 1 0011 1 1 0 0011 1 1 1 024 025 026 027 028 029 030 031 the adt7408 has been designed with a smbus/i2c timeout. the smbus/i2c interface will timeout after 75 ms to 325 ms of no activity on the sda line. after this timeout the adt7408 will reset the sda line bac to its idle state sda set to high impedance and wait for the net start condition. the serial bus protocol operates as follows 1. the master initiates data transfer by establishing a start condition, defined as a high to low transition on the serial data line sda while the serial cloc line scl remains high. this indicates that an address/data stream will follow. all slave peripherals connected to the serial bus respond to the start condition and shift in the net eight bits, consisting of a 7-bit address msb first plus a r/ w bit. the r/ w bit determines whether data will be written to, or read from, the slave device. 2. the peripheral with the address corresponding to the transmitted address responds by pulling the data line low during the low period before the ninth cloc pulse, nown as the acnowledge bit. all other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. if the r/ w bit is a 0 then the master will write to the slave device. if the r/ w bit is a 1 the master will read from the slave device. 3. data is sent over the serial bus in seuences of 9 cloc pulses, 8 bits of data followed by an acnowledge bit from the receiver of data. transitions on the data line must occur during the low period of the cloc signal and remain stable during the high period, as a low to high transition when the cloc is high may be interpreted as a stop signal. 4. when all data bytes have been read or written, stop conditions are established. in write mode, the master will pull the data line high during the 10th cloc pulse to assert a stop condition. in read mode, the master device will pull the data line high during the low period before the 9th cloc pulse. this is nown as no acnowledge. the master will then tae the data line low during the low period before the 10th cloc pulse, then high during the 10th cloc pulse to assert a stop condition. any number of bytes of data may be transferred over the serial bus in one operation. owever, it is not possible to mi read and write in one operation because the type of operation is determined at the beginning and cannot subseuently be changed without starting a new operation. the i 2 c address set up by the three address pins is not latched by the device until after this address has been sent twice. on the 8th scl cycle of the second valid communication, the serial bus address is latched in. this is the scl cycle directly after the device has seen its own i 2 c serial bus address. any subseuent changes on this pin will have no affect on the i 2 c serial bus address. event adt7408
adt7408 preliminary technical data rev. prc | page 16 of 22 smbus/i2c communications the data registers in the adt7408 are selected by the pointer register. at power-up th e pointer register is set to 0x00, the lo cation for the capability register. the pointer register latches the last loca tion it was set to. each data register falls into one of the three types of user accessibility: 1. read only 2. wr ite only 3. write/read same address a write to the adt7408 will always include the address byte and the pointer byte. a write to any register, other than the point er register, requires two data bytes. reading data from the adt7408 can take place either of two ways: if the location latched in the pointer register is correct, then the read can simply consist of an address byte, followed by re trieving the two data bytes. if the pointer register needs to be set, then an address byte, pointer byte, repeat start, and another address byte will accomp lish a read. the data byte has the most significant bit first. at the end of a read, the adt7408 can accept either acknowledge (ack) or no acknowledge (no ack) from the master (no acknowledge is typically used as a signal for the slave that the master has read its l ast byte). it takes the adt7408 97ms to measure the temperature. writing data to a register except the pointer register, all other registers are 16-bits wide so two bytes of data are written to these register. writing t wo bytes of data to thes e register consists of the serial bus address, the data register address written to the pointer register, followed by the two data bytes written to th e selected data register. this is illustrated in figure . if more than the required number of data bytes is written to a register then the register will ignore these extra data bytes. to write to a different register, another start or repeated start is required.
preliminary technical data adt7408 rev. prc | page 17 of 22 figure 8. writing to the address pointer register followed by two bytes of data reading data from the adt7408 reading data from the adt7408 can take place in either of two ways: writing to the pointer register for a subsequent read in order to read data from a particular register, the pointer re gister must contain the address of the data register. if it doe s not, the correct address must be written to the address pointer register by performing a single-byte write operation, as shown in figure 9. the write operation consists of the serial bus address followed by the pointer byte. no data is written to any of the data registers. since the location latched in the pointer register is correct, then the read can simply consist of an address byte, followed by retrieving the two data bytes as shown in figure 10.
adt7408 preliminary technical data rev. prc | page 18 of 22 figure 9. writing to the address pointer register to select a register for a subsequent read operation figure 10. reading back data from the register with the preset pointer reading from any pointer register on the other hand, if the pointer register needs to be set, then an address byte, pointer byte, repeat start, and another addre ss byte will accomplish a read as shown in figure 11.
preliminary technical data adt7408 rev. prc | page 19 of 22 figure 11. write to the pointer register followed by a repeat start and an immediate data word read
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preliminary technical data adt7408 rev. prc | page 21 of 22 one example of using the adt7408?s unique properties is in monitoring a high power dissipation dimm module. ideally the adt7408 device should be mounted in the middle between the two memory chips major heat sources as shown in figure 13. the adt7408 produces a linear temperature output while needing only two i/o pins and requiring no external characterization. figure 13. locations of adt7408 on dimm module
adt7408 preliminary technical data rev. prc | page 22 of 22 outline dimensions figure 14. 8-lead frame chip scale package [lfcsp] 3 x 3 mm body (cp-8) dimensions shown in millimeters ordering guide model temperature range temperature accuracy 1 package description package option ordering quantity branding adt7408ccpz 2 -r2 ?20c to +125c 2c 8-lead lfcsp cp-8 250 t1m adt7408ccpz 2 -reel ?20c to +125c 2c 8-lead lfcsp cp-8 5,000 t1m adt7408ccpz 2 -reel7 ?20c to +125c 2c 8-lead lfcsp cp-8 1,500 t1m 1 temperature accuracy is over the -20c to +100c temperature range. 2 pb-free part purchase of licensed i 2 c components of analog devices or one of its sublicensed associated companies conveys a license for the purchaser under the phi lips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips.

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